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Searched refs:RLC_GPM_STAT__RESTORING_REGISTERS_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_0_sh_mask.h8717 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK 0x400 macro
H A Dgfx_8_1_sh_mask.h9267 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK 0x400 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23025 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_9_2_1_sh_mask.h24367 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_9_1_sh_mask.h24316 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_9_4_3_sh_mask.h26623 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_9_4_2_sh_mask.h21821 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_11_0_0_sh_mask.h36092 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_11_0_3_sh_mask.h39430 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_10_1_0_sh_mask.h34769 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro
H A Dgc_10_3_0_sh_mask.h34015 #define RLC_GPM_STAT__RESTORING_REGISTERS_MASK … macro