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Searched refs:RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_7_2_sh_mask.h8105 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK 0xf0 macro
H A Dgfx_8_0_sh_mask.h9017 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK 0xf0 macro
H A Dgfx_8_1_sh_mask.h9557 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK 0xf0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h19813 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_9_2_1_sh_mask.h21051 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_9_1_sh_mask.h21124 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_9_4_3_sh_mask.h23179 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_9_4_2_sh_mask.h13257 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_11_0_0_sh_mask.h27170 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_11_0_3_sh_mask.h29691 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_10_1_0_sh_mask.h27789 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro
H A Dgc_10_3_0_sh_mask.h26068 #define RLC_GPM_PERF_COUNT_0__SE_INDEX_MASK … macro