Searched refs:RK3328_PRE_PLL_PRE_DIV (Results 1 – 1 of 1) sorted by relevance
138 #define RK3328_PRE_PLL_PRE_DIV(x) UPDATE(x, 5, 0) macro953 inno_write(inno, 0xa1, RK3328_PRE_PLL_PRE_DIV(cfg->prediv)); in inno_hdmi_phy_rk3328_clk_set_rate()