Searched refs:RK3328_PRE_PLL_FB_DIV_7_0 (Results 1 – 1 of 1) sorted by relevance
147 #define RK3328_PRE_PLL_FB_DIV_7_0(x) UPDATE(x, 7, 0) macro959 inno_write(inno, 0xa3, RK3328_PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3328_clk_set_rate()