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Searched refs:RISCV_U_SOC (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/riscv/
H A Dsifive_u.h35 #define RISCV_U_SOC(obj) \ macro
/openbmc/qemu/hw/riscv/
H A Dsifive_u.c750 SiFiveUSoCState *s = RISCV_U_SOC(obj); in type_init()
782 SiFiveUSoCState *s = RISCV_U_SOC(dev); in sifive_u_soc_realize()