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Searched refs:RISCV_IOMMU_REG_PQH (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h140 #define RISCV_IOMMU_REG_PQH 0x0040 macro
H A Driscv-iommu.c154 uint32_t head = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_PQH) & s->pq_mask; in riscv_iommu_pri()
1766 stl_le_p(&s->regs_ro[RISCV_IOMMU_REG_PQH], ~s->pq_mask); in riscv_iommu_process_pq_control()
1767 stl_le_p(&s->regs_rw[RISCV_IOMMU_REG_PQH], 0); in riscv_iommu_process_pq_control()
1773 stl_le_p(&s->regs_ro[RISCV_IOMMU_REG_PQH], ~0); in riscv_iommu_process_pq_control()