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Searched refs:RISCV_IOMMU_PREQ_HDR_PID (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h48 #define RISCV_IOMMU_PREQ_HDR_PID GENMASK_ULL(31, 12) macro
380 #define RISCV_IOMMU_PREQ_HDR_PID GENMASK_ULL(31, 12) macro
H A Driscv-iommu.c1392 RISCV_IOMMU_PREQ_HDR_PID, ctx->process_id); in riscv_iommu_translate()