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Searched refs:RISCV_IOMMU_PQCSR_PQMF (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h169 #define RISCV_IOMMU_PQCSR_PQMF RISCV_IOMMU_QUEUE_MEM_FAULT macro
H A Driscv-iommu.c163 !!(ctrl & (RISCV_IOMMU_PQCSR_PQOF | RISCV_IOMMU_PQCSR_PQMF))) { in riscv_iommu_pri()
175 RISCV_IOMMU_PQCSR_PQMF, 0); in riscv_iommu_pri()
1770 ctrl_clr = RISCV_IOMMU_PQCSR_BUSY | RISCV_IOMMU_PQCSR_PQMF | in riscv_iommu_process_pq_control()
1892 pqcsr & RISCV_IOMMU_PQCSR_PQMF)) { in riscv_iommu_update_ipsr()
2187 stl_le_p(&s->regs_wc[RISCV_IOMMU_REG_PQCSR], RISCV_IOMMU_PQCSR_PQMF | in riscv_iommu_realize()