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Searched refs:RISCV_IOMMU_PC_FSC_RESERVED (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h365 #define RISCV_IOMMU_PC_FSC_RESERVED GENMASK_ULL(59, 44) macro
H A Driscv-iommu.c806 if (get_field(ctx->satp, RISCV_IOMMU_PC_FSC_RESERVED)) { in riscv_iommu_validate_process_ctx()