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Searched refs:RISCV_IOMMU_PC_FSC_PPN (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h364 #define RISCV_IOMMU_PC_FSC_PPN GENMASK_ULL(43, 0) macro
H A Driscv-iommu.c1025 addr = PPN_PHYS(get_field(de, RISCV_IOMMU_PC_FSC_PPN)); in riscv_iommu_ctx_fetch()