Searched refs:RISCV_IOMMU_FQ_HDR_PID (Results 1 – 2 of 2) sorted by relevance
34 #define RISCV_IOMMU_FQ_HDR_PID GENMASK_ULL(31, 12) macro
525 ev.hdr = set_field(ev.hdr, RISCV_IOMMU_FQ_HDR_PID, ctx->process_id); in riscv_iommu_report_fault()