Home
last modified time | relevance | path

Searched refs:RISCV_IOMMU_FQ_CAUSE_MSI_MISCONFIGURED (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h339 RISCV_IOMMU_FQ_CAUSE_MSI_MISCONFIGURED = 263, enumerator
H A Driscv-iommu.c606 cause = RISCV_IOMMU_FQ_CAUSE_MSI_MISCONFIGURED; in riscv_iommu_msi_write()
617 cause = RISCV_IOMMU_FQ_CAUSE_MSI_MISCONFIGURED; in riscv_iommu_msi_write()