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Searched refs:RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu.c326 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_spa_fetch()
333 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_spa_fetch()
346 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_spa_fetch()
355 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_spa_fetch()
364 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_spa_fetch()
371 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_spa_fetch()
508 case RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED: in riscv_iommu_report_fault()
902 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_ctx_fetch()
941 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_ctx_fetch()
969 return RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED; in riscv_iommu_ctx_fetch()
H A Driscv-iommu-bits.h335 RISCV_IOMMU_FQ_CAUSE_DDT_MISCONFIGURED = 259, enumerator