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Searched refs:RISCV_IOMMU_DDTP_PPN (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h101 #define RISCV_IOMMU_DDTP_PPN RISCV_IOMMU_PPN_FIELD macro
H A Driscv-iommu.c861 dma_addr_t addr = PPN_PHYS(get_field(ddtp, RISCV_IOMMU_DDTP_PPN)); in riscv_iommu_ctx_fetch()
1525 new_ddtp = set_field(new_ddtp & RISCV_IOMMU_DDTP_PPN, in riscv_iommu_process_ddtp()
2172 ~(RISCV_IOMMU_DDTP_PPN | RISCV_IOMMU_DDTP_MODE)); in riscv_iommu_realize()