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Searched refs:RISCV_IOMMU_DC_TC_SXL (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h243 #define RISCV_IOMMU_DC_TC_SXL BIT_ULL(11) macro
H A Driscv-iommu.c315 (ctx->tc & RISCV_IOMMU_DC_TC_SXL)) { in riscv_iommu_spa_fetch()
755 if (ctx->tc & RISCV_IOMMU_DC_TC_SXL) { in riscv_iommu_validate_device_ctx()
822 if (ctx->tc & RISCV_IOMMU_DC_TC_SXL) { in riscv_iommu_validate_process_ctx()