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Searched refs:RISCV_IOMMU_DC_IOHGATP_MODE_BARE (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h251 RISCV_IOMMU_DC_IOHGATP_MODE_BARE = 0, enumerator
H A Driscv-iommu.c279 en_g = gatp != RISCV_IOMMU_DC_IOHGATP_MODE_BARE; in riscv_iommu_spa_fetch()
318 case RISCV_IOMMU_DC_IOHGATP_MODE_BARE: in riscv_iommu_spa_fetch()
338 case RISCV_IOMMU_DC_IOHGATP_MODE_BARE: in riscv_iommu_spa_fetch()
725 gatp == RISCV_IOMMU_DC_IOHGATP_MODE_BARE) { in riscv_iommu_validate_device_ctx()
876 RISCV_IOMMU_DC_IOHGATP_MODE_BARE); in riscv_iommu_ctx_fetch()