Home
last modified time | relevance | path

Searched refs:RISCV_IOMMU_CQCSR_FENCE_W_IP (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h152 #define RISCV_IOMMU_CQCSR_FENCE_W_IP BIT(11) macro
H A Driscv-iommu.c1711 RISCV_IOMMU_CQCSR_FENCE_W_IP; in riscv_iommu_process_cq_control()
1861 (cqcsr & RISCV_IOMMU_CQCSR_FENCE_W_IP || in riscv_iommu_update_ipsr()