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Searched refs:RISCV_IOMMU_CQCSR_CIE (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/tests/qtest/libqos/
H A Driscv-iommu.h47 #define RISCV_IOMMU_CQCSR_CIE RISCV_IOMMU_QUEUE_INTR_ENABLE macro
/openbmc/qemu/tests/qtest/
H A Driscv-iommu-test.c66 g_assert_cmpuint(reg & RISCV_IOMMU_CQCSR_CIE, ==, 0); in test_reg_reset()
/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h148 #define RISCV_IOMMU_CQCSR_CIE RISCV_IOMMU_QUEUE_INTR_ENABLE macro
H A Driscv-iommu.c1688 if (ctrl & RISCV_IOMMU_CQCSR_CIE) { in riscv_iommu_process_cq_tail()
1860 if (cqcsr & RISCV_IOMMU_CQCSR_CIE && in riscv_iommu_update_ipsr()