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Searched refs:RISCV_IOMMU_CMD_OPCODE (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h271 #define RISCV_IOMMU_CMD_OPCODE GENMASK_ULL(6, 0) macro
H A Driscv-iommu.c1571 RISCV_IOMMU_CMD_OPCODE | RISCV_IOMMU_CMD_FUNC); in riscv_iommu_process_cq_tail()