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Searched refs:RISCV_IOMMU_CAP_SV39X4 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h77 #define RISCV_IOMMU_CAP_SV39X4 BIT_ULL(17) macro
H A Driscv-iommu.c344 sv_mode = pass ? RISCV_IOMMU_CAP_SV39X4 : RISCV_IOMMU_CAP_SV39; in riscv_iommu_spa_fetch()
2132 s->cap |= RISCV_IOMMU_CAP_SV32X4 | RISCV_IOMMU_CAP_SV39X4 | in riscv_iommu_realize()