Home
last modified time | relevance | path

Searched refs:RISCV_IOMMU_ATP_MODE_FIELD (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h67 #define RISCV_IOMMU_ATP_MODE_FIELD GENMASK_ULL(63, 60) macro
248 #define RISCV_IOMMU_DC_IOHGATP_MODE RISCV_IOMMU_ATP_MODE_FIELD
263 #define RISCV_IOMMU_DC_FSC_MODE RISCV_IOMMU_ATP_MODE_FIELD
355 #define RISCV_IOMMU_DC_MSIPTP_MODE RISCV_IOMMU_ATP_MODE_FIELD
H A Driscv-iommu.c275 satp = get_field(ctx->satp, RISCV_IOMMU_ATP_MODE_FIELD); in riscv_iommu_spa_fetch()
276 gatp = get_field(ctx->gatp, RISCV_IOMMU_ATP_MODE_FIELD); in riscv_iommu_spa_fetch()
723 gatp = get_field(ctx->gatp, RISCV_IOMMU_ATP_MODE_FIELD); in riscv_iommu_validate_device_ctx()
875 ctx->gatp = set_field(0, RISCV_IOMMU_ATP_MODE_FIELD, in riscv_iommu_ctx_fetch()
877 ctx->satp = set_field(0, RISCV_IOMMU_ATP_MODE_FIELD, in riscv_iommu_ctx_fetch()