Home
last modified time | relevance | path

Searched refs:RISCV_IMPLIED_EXTS_RULE_END (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu.c2272 RISCV_IMPLIED_EXTS_RULE_END
2280 .implied_multi_exts = { RISCV_IMPLIED_EXTS_RULE_END },
2289 RISCV_IMPLIED_EXTS_RULE_END
2299 RISCV_IMPLIED_EXTS_RULE_END
2309 RISCV_IMPLIED_EXTS_RULE_END
2318 RISCV_IMPLIED_EXTS_RULE_END
2328 RISCV_IMPLIED_EXTS_RULE_END
2338 RISCV_IMPLIED_EXTS_RULE_END
2348 RISCV_IMPLIED_EXTS_RULE_END
2357 RISCV_IMPLIED_EXTS_RULE_END
[all …]
H A Dcpu.h153 #define RISCV_IMPLIED_EXTS_RULE_END -1 macro
/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c834 rule->implied_multi_exts[i] != RISCV_IMPLIED_EXTS_RULE_END; i++) { in cpu_enable_implied_rule()