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Searched refs:RISCV_IMPLIED_EXTS_RULE_END (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu.c2269 RISCV_IMPLIED_EXTS_RULE_END
2286 RISCV_IMPLIED_EXTS_RULE_END
2296 RISCV_IMPLIED_EXTS_RULE_END
2306 RISCV_IMPLIED_EXTS_RULE_END
2315 RISCV_IMPLIED_EXTS_RULE_END
2325 RISCV_IMPLIED_EXTS_RULE_END
2335 RISCV_IMPLIED_EXTS_RULE_END
2345 RISCV_IMPLIED_EXTS_RULE_END
2354 RISCV_IMPLIED_EXTS_RULE_END
2363 RISCV_IMPLIED_EXTS_RULE_END
[all …]
H A Dcpu.h148 #define RISCV_IMPLIED_EXTS_RULE_END -1 macro
/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c798 rule->implied_multi_exts[i] != RISCV_IMPLIED_EXTS_RULE_END; i++) { in cpu_enable_implied_rule()