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Searched refs:RISCV_EXCP_SW_CHECK_FCFI_TVAL (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_bits.h699 #define RISCV_EXCP_SW_CHECK_FCFI_TVAL 2 macro
H A Dtranslate.c1297 tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_FCFI_TVAL), in riscv_tr_translate_insn()
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc56 tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_FCFI_TVAL),
69 tcg_gen_st_tl(tcg_constant_tl(RISCV_EXCP_SW_CHECK_FCFI_TVAL),