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Searched refs:RISCV_EXCP_SEMIHOST (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_privileged.c.inc69 generate_exception(ctx, RISCV_EXCP_SEMIHOST);
/openbmc/qemu/target/riscv/
H A Dcpu_bits.h785 RISCV_EXCP_SEMIHOST = 0x3f, enumerator