Searched refs:RISCVIOMMUState (Results 1 – 5 of 5) sorted by relevance
| /openbmc/qemu/hw/riscv/ |
| H A D | riscv-iommu.h | 30 struct RISCVIOMMUState { struct
61 void (*notify)(RISCVIOMMUState *iommu, unsigned vector); argument
82 QLIST_ENTRY(RISCVIOMMUState) iommus; argument
96 void riscv_iommu_pci_setup_iommu(RISCVIOMMUState *iommu, PCIBus *bus, argument
98 void riscv_iommu_set_cap_igs(RISCVIOMMUState *s, riscv_iommu_igs_mode mode);
99 void riscv_iommu_reset(RISCVIOMMUState *s);
100 void riscv_iommu_notify(RISCVIOMMUState *s, int vec_type);
119 static inline uint32_t riscv_iommu_reg_mod32(RISCVIOMMUState *s, in riscv_iommu_reg_mod32()
127 static inline void riscv_iommu_reg_set32(RISCVIOMMUState *s, unsigned idx, in riscv_iommu_reg_set32()
133 static inline uint32_t riscv_iommu_reg_get32(RISCVIOMMUState *s, unsigned idx) in riscv_iommu_reg_get32()
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| H A D | riscv-iommu-hpm.h | 25 uint64_t riscv_iommu_hpmcycle_read(RISCVIOMMUState *s);
26 void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s, RISCVIOMMUContext *ctx,
29 void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh);
30 void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s);
31 void riscv_iommu_process_hpmevt_write(RISCVIOMMUState *s, uint32_t evt_reg);
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| H A D | riscv-iommu-hpm.c | 33 uint64_t riscv_iommu_hpmcycle_read(RISCVIOMMUState *s) in riscv_iommu_hpmcycle_read()
58 static void hpm_incr_ctr(RISCVIOMMUState *s, uint32_t ctr_idx) in hpm_incr_ctr()
87 void riscv_iommu_hpm_incr_ctr(RISCVIOMMUState *s, RISCVIOMMUContext *ctx, in riscv_iommu_hpm_incr_ctr()
177 RISCVIOMMUState *s = priv; in riscv_iommu_hpm_timer_cb()
210 static void hpm_setup_timer(RISCVIOMMUState *s, uint64_t value) in hpm_setup_timer()
241 void riscv_iommu_process_iocntinh_cy(RISCVIOMMUState *s, bool prev_cy_inh) in riscv_iommu_process_iocntinh_cy()
272 void riscv_iommu_process_hpmcycle_write(RISCVIOMMUState *s) in riscv_iommu_process_hpmcycle_write()
312 static void update_event_map(RISCVIOMMUState *s, uint64_t value, in update_event_map()
353 void riscv_iommu_process_hpmevt_write(RISCVIOMMUState *s, uint32_t evt_reg) in riscv_iommu_process_hpmevt_write()
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| H A D | riscv-iommu-pci.c | 68 RISCVIOMMUState iommu; /* common IOMMU state */
72 static void riscv_iommu_pci_notify(RISCVIOMMUState *iommu, unsigned vector) in riscv_iommu_pci_notify()
84 RISCVIOMMUState *iommu = &s->iommu; in riscv_iommu_pci_realize()
154 RISCVIOMMUState *iommu = &s->iommu; in riscv_iommu_pci_init()
174 RISCVIOMMUState *iommu = &pci->iommu; in riscv_iommu_pci_reset_hold()
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| H A D | riscv-iommu-sys.c | 44 RISCVIOMMUState iommu;
116 RISCVIOMMUState *iommu = &s->iommu; in riscv_iommu_sysdev_init_msi()
149 static void riscv_iommu_sysdev_notify(RISCVIOMMUState *iommu, in riscv_iommu_sysdev_notify()
197 RISCVIOMMUState *iommu = &s->iommu; in riscv_iommu_sys_init()
216 RISCVIOMMUState *iommu = &sys->iommu; in riscv_iommu_sys_reset_hold()
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