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Searched refs:RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h11524 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT 0x4 macro
H A Ddce_10_0_sh_mask.h12626 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h12632 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h13248 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h56099 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27128 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_1_0_sh_mask.h972 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h240 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h47868 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h51063 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h54175 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h59171 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h62753 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h47870 #define RIRB_SIZE__RIRB_SIZE_CAPABILITY__SHIFT … macro