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Searched refs:RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_sh_mask.h11514 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT 0x1 macro
H A Ddce_10_0_sh_mask.h12616 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT 0x1 macro
H A Ddce_11_0_sh_mask.h12622 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT 0x1 macro
H A Ddce_11_2_sh_mask.h13238 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT 0x1 macro
H A Ddce_12_0_sh_mask.h56087 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h27116 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_1_0_sh_mask.h960 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h228 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h47856 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h51056 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h54163 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h59159 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h62741 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h47858 #define RIRB_CONTROL__RIRB_DMA_ENABLE__SHIFT … macro