Searched refs:RG_HDMITXPLL_FBKDIV_HIGH (Results 1 – 2 of 2) sorted by relevance
101 #define RG_HDMITXPLL_FBKDIV_HIGH BIT(31) macro
193 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_FBKDIV_HIGH, fbkdiv_high); in mtk_hdmi_pll_set_hw()