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Searched refs:RESULT_CONTROL_PUP_0_BIT_5_REG (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_plat.h141 #define RESULT_CONTROL_PUP_0_BIT_5_REG 0x18c8 macro
H A Dddr3_training_ip_engine.c25 RESULT_CONTROL_PUP_0_BIT_4_REG, RESULT_CONTROL_PUP_0_BIT_5_REG,
79 RESULT_CONTROL_PUP_0_BIT_4_REG, RESULT_CONTROL_PUP_0_BIT_5_REG,