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Searched refs:REG_TRAINING_WL_RESULTS_OFFS (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h323 #define REG_TRAINING_WL_RESULTS_OFFS 20 macro
H A Dddr3_write_leveling.c1209 reg = (reg_read(REG_TRAINING_WL_ADDR) >> REG_TRAINING_WL_RESULTS_OFFS) & in ddr3_write_leveling_single_cs()
1255 reg = (reg >> REG_TRAINING_WL_RESULTS_OFFS) & in ddr3_write_leveling_single_cs()