Home
last modified time | relevance | path

Searched refs:REG_TRAINING_WL_RATIO_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c1193 REG_TRAINING_WL_RATIO_MASK) | REG_TRAINING_WL_1TO1; in ddr3_write_leveling_single_cs()
1196 REG_TRAINING_WL_RATIO_MASK) | REG_TRAINING_WL_2TO1; in ddr3_write_leveling_single_cs()
1238 REG_TRAINING_WL_RATIO_MASK) | in ddr3_write_leveling_single_cs()
1242 REG_TRAINING_WL_RATIO_MASK) | in ddr3_write_leveling_single_cs()
H A Dddr3_axp.h318 #define REG_TRAINING_WL_RATIO_MASK 0xFFFFFF0F macro