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Searched refs:REG_TRAINING_WL_DELAYEXP_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h321 #define REG_TRAINING_WL_DELAYEXP_MASK 0x20000000 macro
H A Dddr3_write_leveling.c1205 REG_TRAINING_WL_DELAYEXP_MASK; in ddr3_write_leveling_single_cs()
1250 REG_TRAINING_WL_DELAYEXP_MASK; in ddr3_write_leveling_single_cs()