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Searched refs:REG_TRAINING_DEBUG_2_ADDR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c634 add = reg_read(REG_TRAINING_DEBUG_2_ADDR); in ddr3_read_leveling_single_cs_rl_mode()
699 add = reg_read(REG_TRAINING_DEBUG_2_ADDR); in ddr3_read_leveling_single_cs_rl_mode()
1039 add = reg_read(REG_TRAINING_DEBUG_2_ADDR); in ddr3_read_leveling_single_cs_window_mode()
1174 add = reg_read(REG_TRAINING_DEBUG_2_ADDR); in ddr3_read_leveling_single_cs_window_mode()
H A Dddr3_axp.h242 #define REG_TRAINING_DEBUG_2_ADDR 0x15C4 macro