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Searched refs:REG_TEST_FLD (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/accel/ivpu/
H A Divpu_hw_40xx.c703 if (!REG_TEST_FLD(VPU_40XX_BUTTRESS_TILE_FUSE, VALID, fuse)) { in ivpu_hw_40xx_info_init()
889 return REG_TEST_FLD(VPU_40XX_BUTTRESS_VPU_STATUS, READY, val) && in ivpu_hw_40xx_is_idle()
890 REG_TEST_FLD(VPU_40XX_BUTTRESS_VPU_STATUS, IDLE, val); in ivpu_hw_40xx_is_idle()
1028 if (REG_TEST_FLD(VPU_40XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT, status)) in ivpu_hw_40xx_irqv_handler()
1064 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR, status)) { in ivpu_hw_40xx_irqb_handler()
1150 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR, irqb)) { in ivpu_hw_40xx_diagnose_failure()
1156 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, CFI0_ERR, irqb)) in ivpu_hw_40xx_diagnose_failure()
1159 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, CFI1_ERR, irqb)) in ivpu_hw_40xx_diagnose_failure()
1162 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, IMR0_ERR, irqb)) in ivpu_hw_40xx_diagnose_failure()
1167 if (REG_TEST_FLD(VPU_40XX_BUTTRESS_INTERRUPT_STAT, IMR1_ERR, irqb)) in ivpu_hw_40xx_diagnose_failure()
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H A Divpu_hw_37xx.c760 return REG_TEST_FLD(VPU_37XX_BUTTRESS_VPU_STATUS, READY, val) && in ivpu_hw_37xx_is_idle()
761 REG_TEST_FLD(VPU_37XX_BUTTRESS_VPU_STATUS, IDLE, val); in ivpu_hw_37xx_is_idle()
919 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT, status)) in ivpu_hw_37xx_irqv_handler()
925 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_1_INT, status)) in ivpu_hw_37xx_irqv_handler()
928 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, MMU_IRQ_2_INT, status)) in ivpu_hw_37xx_irqv_handler()
952 if (REG_TEST_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE, status)) in ivpu_hw_37xx_irqb_handler()
956 if (REG_TEST_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR, status)) { in ivpu_hw_37xx_irqb_handler()
962 if (REG_TEST_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, UFI_ERR, status)) { in ivpu_hw_37xx_irqb_handler()
1019 if (REG_TEST_FLD(VPU_37XX_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, irqv)) in ivpu_hw_37xx_diagnose_failure()
1022 if (REG_TEST_FLD(VPU_37XX_BUTTRESS_INTERRUPT_STAT, ATS_ERR, irqb)) in ivpu_hw_37xx_diagnose_failure()
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H A Divpu_mmu.c848 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_ABT, active)) in ivpu_mmu_irq_gerr_handler()
851 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_PRIQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
854 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_EVTQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
857 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, MSI_CMDQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
860 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, PRIQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
863 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, EVTQ_ABT, active)) in ivpu_mmu_irq_gerr_handler()
866 if (REG_TEST_FLD(VPU_37XX_HOST_MMU_GERROR, CMDQ, active)) in ivpu_mmu_irq_gerr_handler()
H A Divpu_hw_reg_io.h45 #define REG_TEST_FLD(REG, FLD, val) \ macro