Home
last modified time | relevance | path

Searched refs:REG_SDRAM_TIMING_LOW_ADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_spd.c791 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
800 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
808 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
816 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
824 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
832 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
840 stat_val = ddr3_get_static_mc_value(REG_SDRAM_TIMING_LOW_ADDR,
849 reg_write(REG_SDRAM_TIMING_LOW_ADDR, reg);
H A Dddr3_axp.h96 #define REG_SDRAM_TIMING_LOW_ADDR 0x1408 macro
H A Dddr3_init.c86 debug_print_reg(REG_SDRAM_TIMING_LOW_ADDR); in print_dunit_setup()