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Searched refs:REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h107 #define REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS 22 macro
H A Dddr3_hw_training.c535 REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS); in ddr3_set_performance_params()
539 REG_SDRAM_TIMING_H_R2W_W2R_H_OFFS); in ddr3_set_performance_params()