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Searched refs:REG_SDRAM_TIMING_H_R2W_W2R_H_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h108 #define REG_SDRAM_TIMING_H_R2W_W2R_H_MASK 0x7 macro
H A Dddr3_hw_training.c534 reg &= ~(REG_SDRAM_TIMING_H_R2W_W2R_H_MASK << in ddr3_set_performance_params()
538 reg |= (((trd2wr_wr2rd >> 2) & REG_SDRAM_TIMING_H_R2W_W2R_H_MASK) << in ddr3_set_performance_params()