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Searched refs:REG_RFE_CTRL_ANTA_SRC (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A Drtl8xxxu_8192f.c1284 REG_DPDT_CTRL, REG_RFE_CTRL_ANTA_SRC, in rtl8192fu_phy_iqcalibrate()
1323 rtl8xxxu_write32_mask(priv, REG_RFE_CTRL_ANTA_SRC, 0xF, 0x7); in rtl8192fu_phy_iqcalibrate()
1326 rtl8xxxu_write32_mask(priv, REG_RFE_CTRL_ANTA_SRC, 0xF00, 0x7); in rtl8192fu_phy_iqcalibrate()
1329 rtl8xxxu_write32_mask(priv, REG_RFE_CTRL_ANTA_SRC, 0xF000, 0x7); in rtl8192fu_phy_iqcalibrate()
1579 rtl8xxxu_write32_mask(priv, REG_RFE_CTRL_ANTA_SRC, in rtl8192fu_phy_iq_calibrate()
1588 rtl8xxxu_write32_mask(priv, REG_RFE_CTRL_ANTA_SRC, in rtl8192fu_phy_iq_calibrate()
H A Drtl8xxxu_8723b.c581 val32 = rtl8xxxu_read32(priv, REG_RFE_CTRL_ANTA_SRC); in rtl8723bu_phy_init_antenna_selection()
584 rtl8xxxu_write32(priv, REG_RFE_CTRL_ANTA_SRC, val32); in rtl8723bu_phy_init_antenna_selection()
1582 rtl8xxxu_write8(priv, REG_RFE_CTRL_ANTA_SRC, 0x77); in rtl8723b_enable_rf()
H A Drtl8xxxu_regs.h988 #define REG_RFE_CTRL_ANTA_SRC 0x0930 /* 8723BU */ macro
H A Drtl8xxxu_8192e.c1671 rtl8xxxu_write8(priv, REG_RFE_CTRL_ANTA_SRC, 0x77); in rtl8192e_enable_rf()