Home
last modified time | relevance | path

Searched refs:REG_READ_DATA_READY_DELAYS_OFFS (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_read_leveling.c229 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
233 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
237 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_sw()
668 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_rl_mode()
670 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_rl_mode()
724 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_rl_mode()
725 reg |= ((rd_sample_delay + add) << (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_rl_mode()
1070 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_window_mode()
1072 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_window_mode()
1198 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_read_leveling_single_cs_window_mode()
[all …]
H A Dddr3_dfs.c716 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
717 reg |= ((6) << (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_dfs_high_2_low()
1517 (REG_READ_DATA_READY_DELAYS_OFFS * cs)); in ddr3_dfs_low_2_high()
H A Dddr3_axp.h204 #define REG_READ_DATA_READY_DELAYS_OFFS 8 macro
H A Dddr3_spd.c1050 (REG_READ_DATA_READY_DELAYS_OFFS * cs));