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Searched refs:REG_PLL_CLK_SPEED (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dvsc7326.c98 { REG_PLL_CLK_SPEED, 0x00050c00 },
99 { REG_PLL_CLK_SPEED, 0x00050c00 },
H A Dvsc7326_reg.h26 #define REG_PLL_CLK_SPEED CRA(0x7,0xf,0x19) /* Clock Speed Selection */ macro