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Searched refs:REG_PHY_DQS_REF_DLY_OFFS (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h310 #define REG_PHY_DQS_REF_DLY_OFFS 10 macro
H A Dddr3_hw_training.c560 reg |= ((INIT_WL_DELAY + delay) << REG_PHY_DQS_REF_DLY_OFFS); in ddr3_write_pup_reg()
834 val = (val << REG_PHY_DQS_REF_DLY_OFFS) | in ddr3_read_training_results()
H A Dddr3_pbs.c1513 reg |= ((dqs_delay + delay) << REG_PHY_DQS_REF_DLY_OFFS); in ddr3_pbs_write_pup_dqs_reg()