| /openbmc/linux/arch/mips/ar7/ |
| H A D | irq.c | 19 #define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) macro
22 #define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */
24 #define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */
26 #define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */
30 #define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */
31 #define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */
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| /openbmc/openbmc/meta-facebook/meta-greatlakes/recipes-phosphor/console/obmc-console/ |
| H A D | select-uart-mux | 5 REG_OFFSET="0x01"
53 i2ctransfer -y -f $i2c_bus_id w2@0x0f $REG_OFFSET $reg_val
55 val=$(i2ctransfer -y -f $i2c_bus_id w1@0x0f $REG_OFFSET r1)
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| /openbmc/u-boot/drivers/gpio/ |
| H A D | pm8916_gpio.c | 17 #define REG_OFFSET(x) ((x) * 0x100) macro
57 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in pm8916_gpio_set_direction()
117 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in pm8916_gpio_get_function()
139 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in pm8916_gpio_get_value()
153 uint32_t gpio_base = priv->pid + REG_OFFSET(offset); in pm8916_gpio_set_value()
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| /openbmc/u-boot/arch/mips/mach-mscc/ |
| H A D | lowlevel_init_luton.S | 10 #define REG_OFFSET(t, o) (t + (o*4)) macro
11 #define REG_MACRO(x) REG_OFFSET(BASE_MACRO, x)
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| /openbmc/linux/drivers/gpu/drm/amd/display/dmub/src/ |
| H A D | dmub_dcn303.c | 23 #define DMUB_SR(reg) REG_OFFSET(reg),
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| H A D | dmub_dcn302.c | 41 #define DMUB_SR(reg) REG_OFFSET(reg),
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| H A D | dmub_dcn301.c | 41 #define DMUB_SR(reg) REG_OFFSET(reg),
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| H A D | dmub_dcn21.c | 41 #define DMUB_SR(reg) REG_OFFSET(reg),
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| H A D | dmub_reg.h | 37 #define REG_OFFSET(reg_name) (BASE(mm##reg_name##_BASE_IDX) + mm##reg_name) macro
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| H A D | dmub_dcn30.c | 42 #define DMUB_SR(reg) REG_OFFSET(reg),
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| H A D | dmub_dcn20.c | 42 #define DMUB_SR(reg) REG_OFFSET(reg),
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| /openbmc/linux/drivers/pinctrl/spear/ |
| H A D | pinctrl-plgpio.c | 28 #define REG_OFFSET(base, reg, pin) (base + reg + (pin / MAX_GPIO_PER_REG) \ macro
85 u32 reg_off = REG_OFFSET(0, reg, pin); in is_plgpio_set()
96 u32 reg_off = REG_OFFSET(0, reg, pin); in plgpio_reg_set()
106 u32 reg_off = REG_OFFSET(0, reg, pin); in plgpio_reg_reset()
349 reg_off = REG_OFFSET(0, plgpio->regs.eit, offset); in plgpio_irq_set_type()
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| /openbmc/linux/arch/riscv/kernel/ |
| H A D | traps_misaligned.c | 129 #define REG_OFFSET(insn, pos) \ macro
133 (ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
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| /openbmc/linux/sound/soc/sh/ |
| H A D | siu_dai.c | 35 #define REG_OFFSET 0xc000 macro
763 info->reg = devm_ioremap(&pdev->dev, res->start + REG_OFFSET, in siu_probe()
764 resource_size(res) - REG_OFFSET); in siu_probe()
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| /openbmc/linux/tools/testing/selftests/kvm/aarch64/ |
| H A D | vgic_init.c | 21 #define REG_OFFSET(vcpu, offset) (((uint64_t)vcpu << 32) | offset) macro
45 REG_OFFSET(vcpu, offset), &ignored_val); in v3_redist_reg_get_errno()
56 REG_OFFSET(vcpu, offset), &val); in v3_redist_reg_get()
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| /openbmc/linux/arch/riscv/kvm/ |
| H A D | vcpu_insn.c | 115 #define REG_OFFSET(insn, pos) \ macro
119 ((ulong *)((ulong)(regs) + REG_OFFSET(insn, pos)))
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| /openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/ |
| H A D | CVE-2023-4039.patch | 760 /* The size of the callee-save registers with a slot in REG_OFFSET. */
768 /* The size of the callee-save registers with a slot in REG_OFFSET that
2776 - /* The size of the callee-save registers with a slot in REG_OFFSET. */
2784 - /* The size of the callee-save registers with a slot in REG_OFFSET that
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