Searched refs:REG_MSU_MINTCTL (Results 1 – 2 of 2) sorted by relevance
14 REG_MSU_MINTCTL = 0x0004, /* MSU-global interrupt control */ enumerator
680 mintctl = ioread32(msc->msu_base + REG_MSU_MINTCTL); in intel_th_msu_init()682 iowrite32(mintctl, msc->msu_base + REG_MSU_MINTCTL); in intel_th_msu_init()683 if (mintctl != ioread32(msc->msu_base + REG_MSU_MINTCTL)) { in intel_th_msu_init()702 mintctl = ioread32(msc->msu_base + REG_MSU_MINTCTL); in intel_th_msu_deinit()704 iowrite32(mintctl, msc->msu_base + REG_MSU_MINTCTL); in intel_th_msu_deinit()