Searched refs:REG_IRQ1_EN1 (Results 1 – 1 of 1) sorted by relevance
96 #define REG_IRQ1_EN1 0x3C8 /* RW Interrupt Mask set bits for IRQ1 */ macro1119 adf7242_write_reg(lp, REG_IRQ1_EN1, IRQ_RX_PKT_RCVD | IRQ_CSMA_CA); in adf7242_hw_init()