Searched refs:REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1 (Results 1 – 2 of 2) sorted by relevance
292 #define REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1 0x000000e8 macro
297 dsi_phy_write(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1, in dsi_pll_commit()495 frac |= ((dsi_phy_read(base + REG_DSI_7nm_PHY_PLL_FRAC_DIV_START_MID_1) & in dsi_pll_7nm_vco_recalc_rate()