Searched refs:REG_DSI_28nm_PHY_PLL_CAL_CFG9 (Results 1 – 2 of 2) sorted by relevance
346 #define REG_DSI_28nm_PHY_PLL_CAL_CFG9 0x00000090 macro
224 dsi_phy_write(base + REG_DSI_28nm_PHY_PLL_CAL_CFG9, 0x00); in dsi_pll_28nm_clk_set_rate()