Searched refs:REG_DIV_CTL_MAIN (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/bridge/ | ||
| H A D | sil-sii8620.h | 965 #define REG_DIV_CTL_MAIN 0x03f2 macro |
| H A D | sil-sii8620.c | 930 sii8620_write(ctx, REG_DIV_CTL_MAIN, rates[i].div); in sii8620_xtal_set_rate() |