Searched refs:REG_DDR3_RANK_CTRL_CS_ENA_MASK (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/drivers/ddr/marvell/axp/ | ||
| H A D | ddr3_axp.h | 284 #define REG_DDR3_RANK_CTRL_CS_ENA_MASK 0xF macro |
| H A D | ddr3_init.c | 1094 REG_DDR3_RANK_CTRL_CS_ENA_MASK; in ddr3_get_cs_ena_from_reg() |