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Searched refs:REG_DDR3_RANK_CTRL_ADDR (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp.h283 #define REG_DDR3_RANK_CTRL_ADDR 0x15E0 macro
H A Dddr3_init.c118 debug_print_reg(REG_DDR3_RANK_CTRL_ADDR); in print_dunit_setup()
1093 return reg_read(REG_DDR3_RANK_CTRL_ADDR) & in ddr3_get_cs_ena_from_reg()
H A Dddr3_spd.c1166 reg_write(REG_DDR3_RANK_CTRL_ADDR, reg);