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Searched refs:REG_DDR3_MR1_ODT_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c681 REG_DDR3_MR1_ODT_MASK; in ddr3_write_leveling_sw()
748 reg &= REG_DDR3_MR1_ODT_MASK; in ddr3_write_leveling_sw()
839 REG_DDR3_MR1_ODT_MASK; in ddr3_write_leveling_sw()
916 REG_DDR3_MR1_ODT_MASK; in ddr3_write_leveling_sw_reg_dimm()
985 reg &= REG_DDR3_MR1_ODT_MASK; in ddr3_write_leveling_sw_reg_dimm()
1071 REG_DDR3_MR1_ODT_MASK; in ddr3_write_leveling_sw_reg_dimm()
H A Dddr3_axp.h273 #define REG_DDR3_MR1_ODT_MASK 0xFFFFFDBB macro
H A Dddr3_spd.c1070 reg = 0x00000044 & REG_DDR3_MR1_ODT_MASK;
1072 reg = 0x00000046 & REG_DDR3_MR1_ODT_MASK;